Software-Defined Radio Brings Agility to Hardware Design

Software-controlled hardware is transforming the technological landscape, and radio hardware has been swept up in this rapid progression. Software-defined radio (SDR), which allows radio hardware to be abstracted in favor of software-based interfaces, has gained significant traction. The broad use cases for SDR span such areas as communication systems, defense, aerospace, test and measurement, signals intelligence (SIGINT), and spectrum monitoring.

Traditionally, radio hardware has been hyper-specialized, comprising tightly integrated microwave hardware and application-specific integrated circuits. SDR rejects this paradigm, instead leveraging field-programmable gate arrays and highly reconfigurable hardware to create a general-purpose radio platform. SDRs do this by separating the radio front end (RFE) and digital back end (DBE), as shown in Figure 1. The decoupling of hardware and software results in the tight coupling of advanced digital-signal–processing (DSP) capabilities with the radio hardware in a platform-agnostic manner.

Basic software-defined radio architecture
Figure 1: Basic SDR architecture

The RFEs in most SDRs contain multiple, independent transmit (Tx) and receive (Rx) chains that are highly reconfigurable. Simple SDRs can have carrier frequency ranges on the order of a few gigahertz, with bandwidth in the tens of megahertz, while state-of-the-art models typically have carrier frequency ranges from near DC to 18 GHz (some options offer up to 40 GHz), with bandwidths up to 3 GHz per transceiver chain. Many SDR Tx and Rx chain configurations are available. Two transceiver chains with shared local oscillators are common for entry-level SDR, while high-performance options leverage up to 16 independent transceiver chains.

FPGAs and DSP capabilities

Unlike traditional radio systems, SDRs have integrated FPGAs, which allow for high-performance reconfigurable DSP. DSP functionalities such as modulation, demodulation, packetization, and preprocessing can be moved to the on-board FPGA for efficiency. This is a marked advantage of SDRs over traditional, ASIC-based DSP architectures, as new functionalities can be adopted.

Though FPGAs accelerate DSP, data must still be moved between the host system and the SDR. In the simpler SDRs, USB can be used for this purpose, but higher-bandwidth SDRs will require a fiber-optic–based backhaul to accommodate the RFE bandwidth. Using standardized protocols such as VITA49, data can be easily transferred to the host system for further processing and storage.

A variety of compute platforms are available for host-based DSP thanks to the universal hardware driver (UHD), an open-source driver that serves as the de facto standard for SDRs. UHD allows for seamless integration with tools such as GNU Radio, GNU Octave, and Simulink. Python and C++ can be leveraged alongside UHD to create custom SDR applications with ease. The open-source nature of UHD is greatly beneficial in that it is not vendor-locked, offers portability between SDR platforms, and has a rich ecosystem on which to draw.

High-bandwidth SDRs provide substantial platform flexibility, but the high bandwidth necessitates a high-speed backhaul between the SDR and the host system. Preprocessing and filtering can readily be performed on the SDR in the FPGA fabric, but moving the data to an external system for further processing and storage typically requires a carefully designed host system. A receive signal path typically goes from the antenna input through a radio chain, ending with analog-to-digital converters (ADCs) passing the digitized data to the FPGA. The FPGA can then send the digital data to a network interface card (NIC) on an external host machine. The transmit path is roughly the inverse, except it involves digital-to-analog converters (DACs) instead of ADCs.

The host system and signal path must be carefully designed to ensure ample buffering and processing capabilities at all stages. Failure to do so will result in data loss from buffer overflows in the Rx chain and underflows in the Tx chain. Buffering issues not only can cause data loss but can also result in significant jitter, which can further compromise data integrity. The design of the Tx and Rx chains must be considered to ensure that the SDR throughput requirements can be met.

Spectrum monitoring, SIGINT, and satellites

A major benefit of SDRs is the flexibility they provide, as they can be integrated rapidly into a variety of applications including spectrum monitoring, radar, and wireless communication. Spectrum-monitoring and SIGINT applications typically have broadband operating requirements. SDRs with reconfigurable multichannel ADCs and fully independent Rx chains can allow a single SDR to monitor wide sections of bandwidth concurrently while enabling small subsections of bandwidth to be captured with better noise characteristics.

Although independent transceiver chains position SDRs as strong candidates for spectrum monitoring, they are also excellent for supporting high-performance radar applications. Phased-array radar systems require a precise clock distribution for phase stability and coherence. The tightly integrated clocks of multichannel SDRs can support the design of new radar radio hardware or upgrades to existing hardware. High-performance SDRs can therefore reduce the design burden as well as the overall cost for a given system.

Low Earth orbit (LEO) satellites have gained traction in recent years for communication systems and scientific advancements. This growth has created a market for ground-stations-as-a-service (GSaaS), as it will remove or reduce the need for satellites to have a dedicated ground station. To enable commercially viable scaling, SDRs for GSaaS will capture very large regions of bandwidth, resulting in the capture of huge volumes of data. This can be problematic for most downstream systems; however, FPGA-based channelizers (Figure 2) can be used for extraction and processing.

FPGA-based channelizer with multiple independent channels
Figure 2: FPGA-based channelizer with multiple independent channels

SDRs are rapidly transforming the development of radio technology. Civilian and defense applications are benefiting from SDRs for faster creation and upgrade of hardware platforms. High-bandwidth radios are in demand, and high-performance SDRs are a natural solution because of their high-bandwidth radio chains, on-board FPGAs, and fiber-based backhaul.

Bringing software-style agility into the realm of hardware introduces a faster iteration rate, resulting in better and faster development of next-generation solutions.

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